Minimum qualifications:

• Bachelor's degree in Electronics or Computer Engineering/Science, or equivalent practical experience.

• 8 years of experience with SoC power modeling and analysis.

• Experience with SOC architecture and power techniques.

Preferred qualifications:

• Master's degree or PhD in Electronics, Computer Engineering, or Computer Science.

• Experience with ASIC design flows.

• Experience with low power architecture and power optimization techniques (e.g., multi Vth/power/voltage domain design, clock gating, power gating, Dynamic Voltage Frequency Scaling).

Our computational challenges are so big, complex and unique we can't just purchase off-the-shelf hardware, we've got to make it ourselves. Your team designs and builds the hardware, software and networking technologies that power all of Google's services. As a Hardware Engineer, you design and build the systems that are the heart of the world's largest and most powerful computing infrastructure. You develop from the lowest levels of circuit design to large system design and see those systems all the way through to high volume manufacturing. Your work has the potential to shape the machinery that goes into our cutting-edge data centers affecting millions of Google users.

With your technical expertise, you lead projects in multiple areas of expertise (i.e., engineering domains or systems) within a data center facility, including construction and equipment installation/troubleshooting/debugging with vendors.

Google's mission is to organize the world's information and make it universally accessible and useful. Our Devices & Services team combines the best of Google AI, Software, and Hardware to create radically helpful experiences for users. We research, design, and develop new technologies and hardware to make our user's interaction with computing faster, seamless, and more powerful. Whether finding new ways to capture and sense the world around us, advancing form factors, or improving interaction methods, the Devices & Services team is making people's lives better through technology.

• Define power requirements for an SoC to optimize Power-Performance-Area (PPA) under current and thermal constraints.

• Define power KPIs and SoC/IP-level power goals, guide architecture, design, implementation, and software to achieve power goals, and track power throughout the design cycle.

• Propose and drive power optimizations throughout the design process from concept to mass productization.

• Perform algorithm development, modeling, and analysis of various power approaches.

• Drive power-performance trade-off analysis for engineering reviews and product roadmap decisions.

Google is proud to be an equal opportunity workplace and is an affirmative action employer. We are committed to equal employment opportunity regardless of race, color, ancestry, religion, sex, national origin, sexual orientation, age, citizenship, marital status, disability, gender identity or Veteran status. We also consider qualified applicants regardless of criminal histories, consistent with legal requirements. See also https://careers.google.com/eeo/ and https://careers.google.com/jobs/dist/legal/OFCCPEEOPost.pdf If you have a need that requires accommodation, please let us know by completing our Accommodations for Applicants form: https://goo.gl/forms/aBt6Pu71i1kzpLHe2.